13/06/2018 17:54:34

Verific’s Parser Platform License Secured by Empyrean

ALAMEDA, Calif., June 13, 2018 (GLOBE NEWSWIRE) -- Verific Design Automation today announced Empyrean, provider of fast and physically aware, design closure and optimization solutions for systems on chip (SoCs), licensed its Parser Platform to function as the front end to Qualib, library quality inspection software.

“Verific is a company providing exceptional value,” says Lifeng Wu, Empyrean’s senior vice president. “Our development group is pleased with the quality and completeness of its product and comprehensive APIs. As a result, the integration between Qualib and Verific’s parser and elaborator was straightforward.”

Empyrean’s Qualib is a comprehensive platform to qualify libraries or intellectual property (IP) early in the design cycle when correcting errors is less costly than during final verification. With advanced features for analysis, debugging, cross-reference and reports generation, Qualib is used by design groups to inspect the consistency of third-party libraries and IP or library and IP creators for regular inspections. It supports multiple formats including Library Exchange Format (LEF), Graphic Database System (GDS), Timing Library Format (TLF), CADKey CADL Language (CDL) and Verilog netlists.

“Qualib is a great tool for implementing a ‘shift-left’ methodology,” remarks Michiel Ligthart, Verific’s president and chief operating officer. “Moving verification and library qualification earlier in the design flow is an ideal way to shave costs and reduce time to tape out. Verific is pleased to be part of this effort.”

Verific’s SystemVerilog, VHDL and universal power format (UPF) Parser Platforms are in production and development flows at semiconductor companies worldwide, from emerging companies to established Fortune 500 vendors. Applications range from analysis, simulation, formal verification and synthesis to emulation and virtual prototyping, in-circuit debug and design for test. Verific distributes its Parser Platforms as C++ source code and compiles on all 32- and 64-bit Unix, Linux, Mac OS and Windows operating systems.

About Empyrean

Founded in 2009, Empyrean is an Electronic Design Automation (EDA) and intellectual property (IP) technology leader delivering fast and true physically aware, design closure and optimization solutions for timing, clock and power of systems on chip (SoCs). The company offers a high-performance accurate circuit simulator and is an analog IP and fast Serdes IP provider. For details, go to: https://www.empyrean.com.cn/

About Verific Design Automation

Verific Design Automation, with offices in Alameda, Calif., and Kolkata, India, provides SystemVerilog, Verilog, VHDL and UPF Parser Platforms that enable project groups to develop advanced electronic design automation (EDA) products quickly and cost effectively. Since 1999, Verific has shipped more than 60,000 copies of its software used worldwide by the EDA and semiconductor industry. Corporate headquarters is located at: 1516 Oak Street, Suite 115, Alameda, Calif. 94501. Telephone: (510) 522-1555.

Engage with Verific at:

Email: info@verific.com

Website: www.verific.com

LinkedIn: https://www.linkedin.com/company-beta/810695

Facebook: https://www.facebook.com/Verific-Design-Automation-100448363329771/

Verific Design Automation acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

For more information, contact:

Nanette Collins

Public Relations for Verific

(617) 437-1822

nanette@nvc.com

 

Primary Logo

Post comment

Related debate

  • 1 week
  • 1 month
  • 1 Year
18 Aug
PNDORA
Foerst den ene vej 📈 og saa den anden vej 📉 og tju og tju og skomagerdreng... 🎶 Jeg er helt overb..
26
14 Aug
VELO
Vi har diskuteret markedet for immunosuppressive medikamenter før, og jeg har i et tidligere indlæg ..
23
16 Aug
GEN
Det er interimdata vi venter på og altså ikke det fulde data sæt - kigger vi på de tre andre fase II..
19
17 Aug
VELO
Q2-18 er udkommet og jeg har fået set lidt på regnskabet. Overordnet set fulgte selskabets resultat ..
18
15 Aug
VELO
Bare t.o. Jeg taler efter planen med Craig Collard i eftermiddag og sender en artikel ud i morgen.  ..
18
13 Aug
VELO
Husk at markedet er gigantisk! Astellas' to produkter AstagrafXL og Prograf solgte for ca. 12 mia. k..
18
15 Aug
 
Endnu et fantast firma på First North...og denne gang med det flatterende navn Hypefactor...   Når m..
16
13 Aug
VELO
Dette er på alle måder et super regnskab. jeg er helt enig med dem der forventer endnu en opjusterin..
16
13 Aug
PNDORA
22,8 mia. kr. i 2017 synes smykkerne var pæne. det tæller mere end din ene mening
16
14 Aug
VELO
Svar fra Kevin Grønnemann, Medwatch.....   Mange tak for din mail og for jeres forslag.   Det er nog..
14

HSBC Bank Plc : Form 8.5 (EPT/RI) - Lonmin PLC

22/02/2018 10:54:53
FORM 8.5 EPT/RI) PUBLIC DEALING DISCLOSURE BY AN EXEMPT PRINCIPAL TRADER WITH RECOGNISED INTERMEDIARY STATUS DEALING IN A CLIENT-SERVING CAPACITY Rule 8.5 of the Takeover Code (the "Code") 1.         KEY INFORMATION (a) Name of exempt principal trader: HSBC BANK PLC (b) Name of offeror/offeree i..

Rathbone Brothers Plc : Preliminary announcement of 2017 results

22/02/2018 07:00:19
Funds under management up 14.3% to £39.1 billionThis is a preliminary statement of annual results published in accordance with FCA Listing Rule 9.7A. It covers the year ended 31 December 2017. Mark Nicholls, Chairman of Rathbone Brothers Plc, said: "UK and global investment markets performed well in 2017, with some indices reaching record levels towards the end of the year. This outcome has b..

Elliott Capital Advisors, L.P : Form 8.3 - GKN Plc

Related news
21/02/2018 15:25:10
FORM 8.3 PUBLIC OPENING POSITION DISCLOSURE/DEALING DISCLOSURE BY A PERSON WITH INTERESTS IN RELEVANT SECURITIES REPRESENTING 1% OR MORE Rule 8.3 of the Takeover Code (the "Code") 1.         KEY INFORMATION (a) Full name of discloser: Elliott Capital Advisors, L.P. (for itself and related general partners ..

Most read news

  • 24 hours
  • 48 hours
  • 1 week
1
Sophos Sweeps Network and Endpoint Security Categories in CRN’s 2018 Annual Report Card – Again!
2
SHAREHOLDER ALERT: MRCY GLCNF GLNCY MD COOL HAIR FPI SBGL NWL GOGO FLKS: The Law Offices of Vincent Wong Reminds Investors of Important Class Action Deadlines
3
SHAREHOLDER ALERT: Brower Piven Encourages Investors Who Have Losses In Excess Of $100,000 From Investment In Vuzix Corporation (Nasdaq: VUZI) To Contact Brower Piven Before The Lead Plaintiff Deadline In Class Action Lawsuit
4
SHAREHOLDER ALERT: FIZZ ACAD FB ABBV TTPH RMTI HMNY GDS NLSN ZN SBGI ORCL: The Law Offices of Vincent Wong Reminds Investors of Important Class Action Deadlines
5
Novagen Exits Transport Operations

Buy and sell signals

  • Trend
  • Moneymachine

Copyright Euroinvestor A/S 2018   Disclaimer and Terms of Use
Quote information is delivered by Morningstar.
Data is delayed 15-20 minutes according to the distribution agreements set by the different exchanges.
 
20 August 2018 06:24:06
(UTC+00:00) Dublin, Edinburgh, Lisbon, London
Version: LiveBranchBuild_20180816.1 - EUROWEB6 - 2018-08-20 07:24:06 - 2018-08-20 06:24:06 - 1000 - Website: OKAY